(1) Field of the Invention
The present invention relates to a method used to fabricate a semiconductor device, and more specifically to a method used to improve the integrity of local interconnect metal structures.
(2) Description of Prior Art
Static random access memory, (SRAM), cells are usually designed to include six metal oxide semiconductor field effect transistors, (MOSFET), usually four N channel, and two P channel, MOSFETs. The SRAM performance and cost objectives have been successfully addressed by the ability of the semiconductor industry to fabricate SRAM devices, using sub-micron features. The smaller features result in a decrease in performance degrading capacitances and resistances, while also allowing a greater number of smaller SRAM chips, to be obtained from a specific size starting substrate, thus reducing the manufacturing cost of a specific SRAM chip. However the increased density of SRAM chips, does result in difficulties for specific semiconductor fabrication disciplines. For example SRAM interconnect metal structures, are now more tightly packed than in prior technologies, in which sub-micron features were not used for the larger SRAM devices. Therefore photolithographic exposures, used to create sub-micron images in masking photoresist layers, have to be carefully designed and performed. One specific photolithographic sequence, adversely influenced by tighter spaced, metal interconnect structures, is the area in which metal interconnect structures are formed overlying metal filled, via holes. The reflection from a metal filled via hole, during photolithographic exposures, can result in the unwanted exposure of adjacent photoresist shapes, leading to yield and reliability problems. These problems result from undesirable metal interconnect shapes, created using masking photoresist shapes, that were adversely influenced by unwanted reflections, during the photolithographic exposure.
This invention will describe a process in which a second titanium nitride layer is used as a component of a local metal interconnect structure, and provides the needed anti-reflective coating, (ARC), layer, needed for high density SRAM fabrication. A first titanium nitride layer is used as a barrier layer, underlying the metal in the via hole. The titanium nitride, ARC layer, used in this invention, is placed overlying a metal filled via hole, and underlying a metal interconnect layer. Subsequent patterning results in a local metal interconnect structure, comprised of a metal layer and the underlying titanium nitride layer, both overlying the metal filled via hole. Prior art, such as Wei, et al, in U.S. Pat. No. 5,449,639, describe a process in which a titanium nitride layer is also used an ARC layer. However Wei et al, use the ARC layer over an interconnect metal structure, where this application uses the ARC layer underlying a metal interconnect structure, and more importantly overlying a tungsten filled via hole, thus restricting unwanted reflections from a tungsten filled via hole, during a photolithographic exposure procedure.